ds105-1 (v1.4) october 18, 2004 www.xilinx.com 1 product specification 1-800-255-7778 ? 2003 xilinx, inc. all rights reserved. all xilinx trademarks, registered trademarks, patents, and disclaimers are as listed a t http://www.xilinx.com/legal.htm . all other trademarks and registered trademarks are the property of their respective owners. all specifications are subject to c hange without notice. introduction the spartan?-ii 2.5v field-programmable gate array (fpga) automotive iq product family gives users high per- formance, abundant logic resources, and a rich feature set. the six-member family offers densities ranging from 15,000 to 200,000 system gates, as shown in ta b l e 1 . spartan-ii devices deliver more gates, i/os, and features per dollar/euro than other fpgas by combining advanced 0.18 m process technology with a streamlined vir- tex?-based architecture. features include block ram (to 56k bits), distributed ram (to 75,264 bits), 16 selectable i/o standards, and four dlls. fast, predictable intercon- nect means that successive design iterations continue to meet timing requirements. the spartan-ii family is a superior alternative to mask-pro- grammed asics. the fpga avoids the initial cost, lengthy development cycles, and inherent risk of conventional asics. also, fpga programmability permits design upgrades in the field with no hardware replacement neces- sary (impossible with asics). features guaranteed to meet full electrical specifications over t j = ?40c to +125c second generation asic replacement technology - densities as high as 5,292 logic cells with up to 200,000 system gates - streamlined features based on virtex architecture - unlimited reprogrammability system level features - selectram+? hierarchical memory: 16 bits/lut distributed ram configurable 4k-bit block ram fast interfaces to external ram - fully pci compliant - low-power segmented routing architecture - full readback ability for verification/observability - dedicated carry logic for high-speed arithmetic - dedicated multiplier support - cascade chain for wide-input functions - abundant registers/latches with enable, set, reset - four dedicated dlls for advanced clock control - four primary low-skew global clock distribution nets - ieee 1149.1 compatible boundary scan logic versatile i/o and packaging - family footprint compatibility in common packages - 16 high-performance interface standards - zero hold time simplifies system timing fully supported by powerful xilinx development system - foundation? ise series: fully integrated software - alliance series?: for use with third-party tools - fully automatic mapping, placement, and routing refer to spartan-ii 2.5v fpga detailed functional description (ds001-2) for device functional description other than the dc parameters listed, all other dc specifications are the same as referenced in the spartan-ii 2.5v fpga dc and switching characteristics (ds001-3) data sheet refer to spartan-ii 2.5v fpga pinout tables (ds001-4) for all pin descriptions 0 spartan-ii 2.5v fpga automotive iq product family: introduction and ordering ds105-1 (v1.4) october 18, 2004 00 product specification r table 1: spartan-ii fpga family members device logic cells system gates (logic and ram) clb array (r x c) total clbs maximum available user i/o (1) total distributed ram bits total block ram bits xc2s15 432 15,000 8 x 12 96 86 6,144 16k xc2s30 972 30,000 12 x 18 216 132 13,824 24k xc2s50 1,728 50,000 16 x 24 384 176 24,576 32k xc2s100 2,700 100,000 20 x 30 600 176 38,400 40k xc2s150 3,888 150,000 24 x 36 864 176 55,296 48k xc2s200 5,292 200,000 28 x 42 1,176 284 75,264 56k notes: 1. all user i/o counts do not include the four global clock/user input pins. see details in table 3, page 3 .
spartan-ii 2.5v fpga automotive iq product family: introduction and ordering information 2 www.xilinx.com ds105-1 (v1.4) october 18, 2004 1-800-255-7778 product specification r dc specifications absolute maximum ratings (1) recommended operating conditions dc characteristics over operating conditions symbol description min max units v ccint supply voltage relative to gnd (2) ?0.5 3.0 v v cco supply voltage relative to gnd (2) ?0.5 4.0 v v ref input reference voltage ?0.5 3.6 v v in input voltage relative to gnd (3) 5v tolerant i/o (4) ?0.5 5.5 v no 5v tolerance (5) ?0.5 v cco +0.5 v v ts voltage applied to 3-state output 5v tolerant i/o (4) ?0.5 5.5 v no 5v tolerance (5) ?0.5 v cco +0.5 v t stg storage temperature (ambient) ?65 +150 c t j junction temperature - +135 c notes: 1. stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. these are stress ratings only, and functional operation of the device at these or any other conditions beyond those listed under operating condi tions is not implied. exposure to absolute maximum ratings conditions for extended periods of time may affect device reliability. 2. power supplies may turn on in any order. 3. v in should not exceed v cco by more than 3.6v over extended periods of time (e.g., longer than a day). 4. spartan-ii i/os are 5v tolerant whenever the lvttl, lvcmos2, or pci33_5 signal standard has been selected. with 5v tolerant i/os selected, the maximum dc overshoot must be limited to either +5.5v or 10 ma, and undershoot must be limited to either ?0.5 v or 10 ma, whichever is easier to achieve. the maximum ac conditions are as follows: the device pins may undershoot to ?2.0v or overshoot to +7.0v, provided this over/undershoot lasts no more than 11 ns with a forcing current no greater than 100 ma. 5. without 5v tolerant i/os selected, the maximum dc overshoot must be limited to either v cco + 0.5v or 10 ma, and undershoot must be limited to ?0.5v or 10 ma, whichever is easier to achieve. the maximum ac conditions are as follows: the device pins ma y undershoot to ?2.0v or overshoot to v cco + 2.0v, provided this over/undershoot lasts no more than 11 ns with a forcing current no greater than 100 ma. 6. for soldering guidelines, see the packaging information on the xilinx website: www.xilinx.com/partinfo/pkgs.htm symbol description min max units t j junction temperature ?40 125 c v ccint supply voltage relative to gnd (1,2) 2.5 ? 5% 2.5 + 5% v v cco supply voltage relative to gnd (2,3) 1.4 3.6 v t in input signal transition time (4) -250ns notes: 1. functional operation is guaranteed down to a minimum v ccint of 2.25v (nominal v ccint ? 10%). for every 50 mv reduction in v ccint below 2.375v (nominal v ccint ? 5%), all delay parameters increase by 3%. 2. supply voltages may be applied in any order desired. 3. minimum and maximum values for v cco vary according to the i/o standard selected. 4. input and output measurement threshold is ~50% of v cco . symbol description min max units i ccintq quiescent v ccint supply current (1) xc2s15 - 60 ma xc2s30 - 115 ma xc2s50 - 125 ma xc2s100 - 140 ma xc2s150 - 165 ma xc2s200 - 200 ma notes: 1. with no output current loads, no active input pull-up resistors, all i/o pins 3-stated and floating.
spartan-ii 2.5v fpga automotive iq product family: introduction and ordering information ds105-1 (v1.4) october 18, 2004 www.xilinx.com 3 product specification 1-800-255-7778 r spartan-ii product availability ta b l e 2 shows the package and speed grades available for spartan-ii family devices. ta b l e 3 shows the maximum user i/os available on the device and the number of user i/os available for each device/package combination. the four global clock pins are usable as additional user i/os when not used as a global clock pin. these pins are not included in user i/o counts. table 2: spartan-ii package and speed grade availability device pins 100 208 256 456 144 type plastic vqfp plastic pqfp fine pitch bga fine pitch bga plastic tqfp code vq100 pq208 fg256 fg456 tq144 xc2s15 -5 q - - - q xc2s30 -5 - q - - q xc2s50 -5 - q q - q xc2s100 -5 - q q - q xc2s150 -5 - q q - - xc2s200 -5 - q - q - notes: 1. q= automotive iq, t j = ?40 c to +125 c. table 3: spartan-ii user i/o chart (1) device maximum user i/o available user i/o according to package type vq100 tq144 pq208 fg256 fg456 xc2s15 86 60 86 - - - xc2s30 132 - 92 132 - - xc2s50 176 - 92 140 176 - xc2s100 176 - 92 140 176 - xc2s150 176 - - 140 176 - xc2s200 284 - - 140 - 284 notes: 1. all user i/o counts do not include the four global clock/user input pins.
spartan-ii 2.5v fpga automotive iq product family: introduction and ordering information 4 www.xilinx.com ds105-1 (v1.4) october 18, 2004 1-800-255-7778 product specification r ordering information revision history version no. date description 1.0 06/17/02 initial xilinx release. 1.1 11/26/02 updated max user i/o in ta bl e 1 and ta bl e 3 for xc2s100 and xc2s150: changed to 176. 1.2 02/14/03 added references to spartan-ii data sheet, added dc characteristics over operating conditions table. 1.3 05/21/04 added vq100 to ta b l e 2 and ta bl e 3 . added vq100 to ordering information. 1.4 10/18/04 added "not to be used in new designs" watermark; moved to "mature products" xc2s50 -5 pq 208 q example: temperature range number of pins package type device type speed grade device ordering options device speed grade number of pins / package type temperature range (t j ) xc2s15 -5 standard performance vq100 100-pin very thin plastic qfp q = automotive iq ?40c to +125c xc2s30 tq144 144-pin plastic thin qfp xc2s50 pq208 208-pin plastic qfp xc2s100 fg256 256-ball fine pitch bga xc2s150 fg456 456-ball fine pitch bga xc2s200 pn 011311
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